1. Field of the Invention
The present invention relates to an information storage device and, more particularly, to a dynamic random access memory (DRAM) having a trench capacitor.
2. Description of the Related Art
In a conventional DRAM cell having a trench capacitor, a charge storage capacitor is connected to a MIS transistor between a source or drain region and an inversion layer, and the inversion layer on the substrate side serves as a charge storage electrode for storing information charges. A charge storage capacitor of an adjoining cell is formed near each DRAM cell through an isolation layer. As is well known, in this case, a depletion layer may extend through the substrate to cause a punch-through between cells.
A conventional trench capacitor cell of this type has an advantage of a high integration, compared with a memory cell of a planar type, but has the following problems.
The first problem is that of a punch-through between cells in the capacitors. In order to reduce a write voltage loss caused by a decrease in a write voltage due to the presence of a threshold voltage, an impurity concentration of a substrate must be lowered. However, when the impurity concentration is excessively low, a depletion layer can extend further to cause a punch-through cells between the trench capacitors of adjacent cells. These capacitors are then electrically coupled to lose information stored in the cells, which degrades the reliability of the memory system.
In a so-called Hi-C capacitor structure wherein a region having a conductivity type opposite to that of the substrate is formed on the wall surface in a trench, the write voltage loss can be reduced. However, the distance between the adjacent trench capacitors is reduced by a diffusion depth of the region having the opposite conductivity type, thus increasing the possibility of the punch-through between cells.
In this case, an ion implantation or diffusion process must be used for doping an impurity into a trench side wall thus increasing difficulties in memory fabrication.
The second problem is that of soft errors. A large depletion layer extends from a storage electrode (i.e., an inversion layer) in a substrate, and minority carriers generated in the depletion layor or the substrate can be easily captured in the depletion layer and injected into the storage electrode, thus causing a soft error when .alpha.-rays are incident on the memory cell.
The third problem is that of the write voltage loss. The charge storage capacitor uses a capacitor formed between a cell plate and an inversion layer of a MOS structure formed in the trench. Accordingly, the maximum write voltage obtained corresponds to a difference between a power supply voltage and a threshold voltage for forming the inversion layer for a voltage applied to the cell plate. More specifically, the maximum voltage available for writing a "HIGH" level is lower than the power supply voltage by about 1 V.